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Senior Staff Engineer, Static Timing Analysis (STA) Engineer jobs in United States
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Marvell Technology · 1 day ago

Senior Staff Engineer, Static Timing Analysis (STA) Engineer

Marvell Technology is a leading provider of semiconductor solutions essential for data infrastructure. They are seeking a Senior Staff Engineer, Static Timing Analysis (STA) Engineer to contribute to innovative projects, working closely with cross-functional teams to ensure designs meet performance goals.
Telecom & CommunicationsSemiconductorManufacturingInternet of ThingsDSPWireless
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Growth Opportunities
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H1B Sponsor Likelynote

Responsibilities

Perform timing analysis and closure on complex partitions
Work with design teams across various disciplines such as Digital/RTL/Analog to ensure design convergence and integration in a timely manner
Implement/support multi-voltage designs through all aspects of implementation (place and route, static timing, physical verification) using industry standard EDA tools
Work with RTL design teams to drive assembly and design closure
Provide technical direction, coaching, and mentoring to junior employees and colleagues when necessary to achieve successful project outcomes
Write scripts in Shell, Python, and TCL to extract data and achieve productivity enhancements through automation

Qualification

Static Timing AnalysisEDA ToolsDigital Design EnvironmentScripting ShellScripting PythonScripting TCLVerilog HDLPhysical DesignMulti-voltage DesignCadence InnovusCommunication SkillsTeam Collaboration

Required

Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field
8+ years experience in back-end physical design and verification
Familiar with hierarchical physical design strategies, methodologies and deep sub-micron technology issues like N5/N3/N2
Familiar with ASIC design flow, Verilog HDL, synthesis and timing closure
Expertise in full-chip & sub-hierarchy integration preferred
Experience integrating and taping out large designs utilizing a digital design environment
Good understanding of RTL to GDS flows and methodology
Good scripting skills in Perl, tcl and Python
Strong knowledge in static timing analysis (Primetime preferred) and SDC timing constraints
Understanding of digital logic and computer architecture
Knowledge of Verilog
Good communication skills and self-discipline contributing in a team environment

Preferred

Experience with multi-voltage and low-power design techniques is a plus
Experience with Cadence Innovus is preferred

Benefits

Employee stock purchase plan with a 2-year look back
Family support programs to help balance work and home life
Robust mental health resources to prioritize emotional well-being
Recognition and service awards to celebrate contributions and milestones

Company

Marvell Technology

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We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.

H1B Sponsorship

Marvell Technology has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (242)
2024 (186)
2023 (154)
2022 (210)
2021 (210)
2020 (165)

Funding

Current Stage
Public Company
Total Funding
unknown
2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired

Leadership Team

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Matthew Murphy
Chairman and CEO
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Radha Nagarajan
SVP & CTO, Optical Engineering
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Company data provided by crunchbase