Design Verification Engineer - ASIC/UVM/SystemVerilog jobs in United States
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Advanced Microdevices Pvt. Ltd. (India) · 12 hours ago

Design Verification Engineer - ASIC/UVM/SystemVerilog

Advanced Micro Devices, Inc. (AMD) is a leader in advanced data center networking technology, dedicated to building great products that enhance next-generation computing experiences. They are seeking a high-impact Design Verification Engineer to develop robust verification architectures and drive closure on complex ASIC designs, collaborating closely with cross-functional teams to ensure high-quality deliverables.

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Responsibilities

Develop robust UVM‑based testbench architectures for IP, subsystem, and SoC‑level verification
Drive test plan creation, feature mapping, and coverage strategy for complex networking and data‑path IP
Develop high‑quality SystemVerilog components: stimulus generators, agents, BFMs/transactors, scoreboards, checkers, assertions, and functional coverage models
Own execution of verification plans, regression triage, and debug of architectural, functional, and performance issues
Root‑cause complex failures across RTL, testbench, interfaces (PCIe/DDR/Ethernet), and system interactions
Optimize simulations, coverage closure, and verification sign‑off methodology
Use industry‑standard simulation, debug, and analysis tools (VCS, Verdi/DVE, coverage tools, waveform analysis suites)
Contribute to verification methodology improvements, automation, and infrastructure enhancements (Python/Tcl/Make)
Collaborate closely with RTL design, architecture, validation, firmware, and emulation/HAPS teams to ensure high‑quality deliverables
Participate in design reviews, micro‑architecture definition, and bring a verification perspective into early design stages
Mentor junior engineers and provide technical leadership within the verification team

Qualification

SystemVerilogUVMVerification ArchitectureDebugging SkillsPythonPCIeEthernetCommunication SkillsMentoring

Required

Expert‑level knowledge of SystemVerilog and UVM
Strong hands‑on experience with SystemVerilog simulators (VCS preferred) and waveform debuggers (Verdi/DVE)
Proven experience in verifying complex IP/subsystems with test plans, coverage, and constrained‑random methodologies
Strong debug skills across architecture, RTL, and testbench layers
Experience with industry protocols such as PCIe, AXI, Ethernet, DDR, DMA engines, or similar data‑path components
Scripting skills in Python, Perl, Shell, Tcl, or equivalent for automation and infrastructure
Bachelor's Degree in Electrical/Computer Engineering or related field

Preferred

Experience with performance verification, power‑aware verification (UPF), or formal verification
Familiarity with FPGA/HAPS‑based validation and acceleration flows
Understanding of networking or high‑speed I/O pipelines
Exposure to architectural modeling or C/C++ reference models
Master's Preferred
Strong analytical and problem‑solving abilities with a proven track record of debugging complex issues
Ability to lead verification tasks independently and drive cross‑team closure
Excellent verbal and written communication skills
Comfortable working in a fast‑paced, collaborative, multi‑site environment
Ability to mentor and guide junior DV engineers

Benefits

AMD benefits at a glance.

Company

Advanced Microdevices Pvt. Ltd. (India)

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Advanced Microdevices (mdi) is a leader in innovative membrane technologies.

Funding

Current Stage
Late Stage

Leadership Team

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Nalini Kant Gupta
Founder & Managing Director
Company data provided by crunchbase