Qualcomm · 1 day ago
GPU PD Engineer (Austin/San Diego)
San Diego, CA
Full-time
Onsite
Entry, Mid Level
$134K/yr - $200K/yr
2+ years expQualcomm Technologies, Inc. is a leading company in the field of integrated graphics core designs. The role focuses on the physical implementation of complex and high-frequency designs, collaborating with various teams to optimize designs and enhance automation in design flows.
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Responsibilities
Experience in Physical design implementation which includes floor-planning, placement, clock implementation, routing for complex, high frequency designs
Experience with physical synthesis and implementation tools - Synopsys Fusion Compiler, ICC2 and Cadence Genus/Innovus
Must have good knowledge of static timing analysis, reliability and power analysis
Strong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designs
Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks
Strong understanding of GPU micro-architecture and collaborate with RTL designers to improve bottlenecks for power and performance
Solid working knowledge of scripting skills including tcl, perl or python
Excellent communication skills and collaborating in a team environment is a must
Clock, power delivery network design, process technology, prior experience in flow and methodology development, block closure leading to successful tape-outs
Hands on experience with Synthesis, DFT, Place and Route, Timing and Reliability Signoff
Hands on experience working with very complex designs that push the envelope of Power, Performance and Area
Hands on experience working with sub-micron technology process nodes eg. 5nm, 4nm and below is highly advantageous
Prior experience in flow and methodology development is an advantage
RTL expertise (Verilog/System Verilog)
Excellent debug and analytical skills
Ability to work well in a collaborative environment with multi-disciplined teams
Qualification
Required
Experience in Physical design implementation which includes floor-planning, placement, clock implementation, routing for complex, high frequency designs
Experience with physical synthesis and implementation tools - Synopsys Fusion Compiler, ICC2 and Cadence Genus/Innovus
Must have good knowledge of static timing analysis, reliability and power analysis
Strong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designs
Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks
Strong understanding of GPU micro-architecture and collaborate with RTL designers to improve bottlenecks for power and performance
Solid working knowledge of scripting skills including tcl, perl or python
Excellent communication skills and collaborating in a team environment is a must
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field
Preferred
Clock, power delivery network design, process technology, prior experience in flow and methodology development, block closure leading to successful tape-outs
Hands on experience with Synthesis, DFT, Place and Route, Timing and Reliability Signoff
Hands on experience working with very complex designs that push the envelope of Power, Performance and Area
Hands on experience working with sub-micron technology process nodes eg. 5nm, 4nm and below is highly advantageous
Prior experience in flow and methodology development is an advantage
RTL expertise (Verilog/System Verilog)
Excellent debug and analytical skills
Ability to work well in a collaborative environment with multi-disciplined teams
Master's degree in Electrical/Computer Engineering
2+ years of direct synthesis and physical design implementation work experience
In depth end to end experience from RTL2GDS, taping out at least 1-2 complex designs in deep sub-micron technology node
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
10001+ employees
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
Leadership Team
Cristiano Amon
President & CEO
I
Isaac Eteminan
CEO
Recent News
Business Standard India
2026-02-09
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