Normal Computing · 12 hours ago
Hardware Engineer, Silicon Design
Buffalo-Niagara Area
Full-time
Hybrid
Mid, Senior LevelNormal Computing builds foundational software and hardware that support the semiconductor industry and critical AI infrastructure. The role involves defining and implementing architecture for novel AI compute blocks, requiring a deep understanding of AI workloads and hands-on RTL coding.
AI InfrastructureArtificial Intelligence (AI)Generative AISemiconductor
Responsibilities
Define microarchitecture for novel AI accelerator blocks, collaborating closely with architecture and research teams to translate algorithmic requirements into efficient hardware implementations
Write high-quality RTL in SystemVerilog for core logic, datapaths, and control structures optimized for AI/ML workloads
Stay current with state-of-the-art AI algorithms and architectures, understanding their computational patterns and hardware implications
Analyze existing AI accelerator architectures and apply lessons learned to new design problems
Work with DV team on digital verification for assigned designs, including testbench development, debugging, coverage, and signoff
Work with physical design engineers to ensure RTL is implementable, performant, and aligned with layout constraints
Contribute to functional or performance models to support early exploration, validation, and design tradeoff analysis
Participate in design reviews, verification reviews, and cross-functional debug from concept through silicon
Qualification
Required
BS, MS, or PhD in Electrical / Electronic Engineering, Computer Engineering, Computer Science, or a related field
Experience in digital logic design for AI/ML accelerators or compute architectures
Deep understanding of modern AI algorithms and architectures, including transformer models, diffusion models, mixture of experts, and other generative AI methods
Strong knowledge of existing AI accelerator architectures (e.g., TPU, Cerebras, Graphcore, Groq, etc.) and the algorithmic/architectural tradeoffs they embody
Proficiency in SystemVerilog for RTL design and verification
Experience designing compute cores, accelerators, or similarly complex logic
Ability to translate algorithmic requirements and research concepts into efficient hardware microarchitecture
Ability to work closely with physical design and verification teams to ensure correct, implementable designs
Comfort operating in an R&D-focused, ambiguous environment where architecture, RTL, and verification evolve together
Preferred
PhD or research experience in AI/ML hardware acceleration, computer architecture, or related areas
Experience implementing novel sparse computation, dataflow architectures, or specialized memory hierarchies for AI workloads
Contributions to AI accelerator research (publications, open-source projects, or prototype systems)
Background in functional or performance modelling to support architecture exploration or validation
Understanding of ML frameworks (PyTorch, JAX, etc.) and their hardware implications
Company
Normal Computing
AI for our most pressing crises in silicon.
Founded in 2022
11-50 employees
H1B Sponsorship
Normal Computing has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (3)
Funding
Current Stage
Early StageTotal Funding
$34.02MKey Investors
ARIACelesta Capital,First Spark VenturesIntel Ignite
2024-10-31Grant
2024-10-01Series Unknown· $25.5M
2023-01-09Seed· $8.52M
Leadership Team
Faris Sbahi
Co-Founder, CEO
Matthias Tan
Co-Founder, COO
Recent News
Company data provided by crunchbase