NXP Semiconductors · 1 day ago
Analog Mixed-Signal Design Co-Op
NXP Semiconductors is seeking an early-career engineer to support Analog-Mixed-Signal and Digital Integration activities for next-generation semiconductor designs. The role involves hands-on exposure to mixed-signal IP integration, RTL coding, AMS simulation environments, and lab validation tasks, while collaborating with experienced engineers.
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Responsibilities
Assist in integrating analog and digital blocks into top-level AMS environments
Prepare schematic and netlist views used for AMS simulations
Run automated connectivity and interface checks under supervision
Support mixed-signal view generation (symbol, Verilog, Verilog-AMS, wreal)
Write and modify simple RTL modules (wrappers, muxes, registers, glue logic)
Assist with integration into digital-on-top flows:
Linting
Elaboration
Basic synthesis checkpoints
Create small testbench utilities to validate RTL functionality
Run AMS simulations (Spectre/Xcelium/AMS Designer) for block- and top-level tests
Collect waveforms, create summary plots, and help analyze failures
Update or create simple AMS testbenches and configuration files
Support bench measurements for AMS blocks and subsystems:
Oscilloscope measurements
Power-up sequences
Data capture using automation scripts
Reproduce issues seen in silicon or lab setups
Follow proper lab/equipment handling and safety procedures
Assist in model packaging, scripting, and build logistics
Update internal documentation, integration guides, and test logs
Participate in team meetings and cross-discipline design reviews
Qualification
Required
Bachelor's degree in Electrical Engineering, Computer Engineering, or closely related field
Solid academic grounding in: Analog circuits, Digital logic design, SPICE simulation, HDL coding (Verilog preferred)
Hands‑on experience through coursework or projects with: Oscilloscopes, logic analyzers, power supplies, SPICE / Cadence / Mentor simulation environments, Simple RTL coding and testbenches
Comfort with Linux, scripting basics (Python, Bash, TCL)
Strong communicator, organized, and eager to learn
Preferred
Completed senior‑level coursework or projects in: Data converters (ADC/DAC), PLLs or clocking circuits, Mixed‑signal IC design
Familiarity with Verilog‑AMS, SystemVerilog, or wreal modeling
Prior lab/Co‑op experience in semiconductor or embedded domains
Exposure to Git, revision control, and automation scripts
Benefits
Health
Dental
Vision insurance
401(k)
Paid leave
Company
NXP Semiconductors
NXP Semiconductors produces secure connectivity solutions for embedded applications.
Funding
Current Stage
Public CompanyTotal Funding
$2.56BKey Investors
European Investment Bank
2025-08-12Post Ipo Debt· $1.5B
2025-01-15Post Ipo Debt· $1.06B
2010-08-06IPO
Leadership Team
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