Packaging Design Engineer - Advanced Wafer-Level & OSAT Processes jobs in United States
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nEye.ai · 3 months ago

Packaging Design Engineer - Advanced Wafer-Level & OSAT Processes

nEye.ai is seeking a highly skilled and experienced Packaging Design Engineer to lead the development of next-generation semiconductor packaging solutions. The role focuses on advanced interconnects and OSAT management, requiring expertise in defining and qualifying high-reliability packaging processes. Responsibilities include serving as the technical lead for outsourced packaging activities, working with foundry partners on TSV processes, and collaborating closely with reliability teams to ensure product performance and reliability.

Advanced MaterialsNanotechnologySemiconductor
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H1B Sponsor Likelynote

Responsibilities

Serve as the technical lead for all outsourced packaging activities, including the selection and qualification of OSAT partners for our specific product requirements
Own the package-level design and material stack-up, making critical decisions on die attach methods, underfill, and molding compounds
Provide technical guidance to internal design teams on package-level design rules and best practices to ensure optimal manufacturability and reliability
Work directly with foundry partners to define, develop, and qualify Through-Silicon Via (TSV) processes that meet our stringent electrical and reliability requirements
Drive the DFM (Design for Manufacturability) of our electrical interconnects, ensuring the process is robust for high-volume production
Define and implement robust reliability test methodologies to characterize and validate new packaging processes and designs
Collaborate closely with the reliability engineering team to prove in all new package designs and processes through rigorous testing and data analysis
Conduct failure analysis on packaging-related issues to identify root causes and implement corrective actions, continuously improving process robustness

Qualification

Semiconductor packaging engineeringThrough-Silicon Vias (TSVs)OSAT managementReliability physicsFailure analysis techniquesDesign for Manufacturability (DFM)Communication skillsTechnical documentation

Required

Bachelor's or Master's degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field
5+ years of experience in semiconductor packaging engineering, with a focus on advanced interconnects
Direct experience developing and qualifying 2.5 or 3D technologies, as well as more mature methodologies
Proven experience in working with and managing OSATs, including a track record of successfully bringing new packaging processes to production
In-depth knowledge of TSV technology, including process development, DFM, and the associated reliability challenges
Strong understanding of reliability physics and failure mechanisms in semiconductor packages
Expertise in failure analysis techniques (e.g., cross-sectioning, SEM, X-ray) and data-driven problem-solving

Preferred

Direct experience with the design and reliability of MEMS encapsulation
Knowledge of statistical process control (SPC) and its application in a high-volume manufacturing environment
Experience with various packaging materials, including underfills, molding compounds, and substrates
Familiarity with industry standards for packaging reliability (e.g., JEDEC)
Strong communication and technical documentation skills, with the ability to articulate complex technical concepts to a variety of audiences

Company

nEye.ai

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We are nEye.ai, an optical switch startup founded in 2020 to revolutionize the future of data centers.

H1B Sponsorship

nEye.ai has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (1)
2023 (1)

Funding

Current Stage
Growth Stage
Total Funding
$72.54M
Key Investors
CapitalGTEDA
2025-04-10Series B· $58M
2023-09-15Series A· $14.54M

Leadership Team

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Tae Joon Seok
Chief Technology Officer & Co-Founder
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Xiaosheng Zhang
Founding Engineer
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Company data provided by crunchbase