TSMC · 14 hours ago
Future Opportunity: Senior Memory Design Engineer (SRAM/Compiler Focus)(7367)
San Jose, CA
Full-time
Hybrid
Entry, Mid, Senior Level
5+ years expTSMC is a leading dedicated semiconductor foundry, and they are seeking a highly talented and motivated Senior Memory Design Engineer with expertise in SRAM and memory compiler development. The role involves driving innovation in advanced memory design, collaborating with cross-functional teams, and overseeing the design, characterization, and verification of Memory IP.
Consumer ElectronicsElectronicsManufacturingProduct DesignSemiconductor
Responsibilities
Drive the design, characterization, and verification methodology for advanced Memory IP at the compiler level, directly impacting SoC designs in customer products
Implement custom digital and analog circuits for advanced SRAM/DRAM/Non-Volatile memory designs, collaborating closely with logic and architecture teams to define comprehensive specifications
Lead and execute memory compiler development, including timing/power characterization, netlist/layout tiling, and IR/EM flow analysis
Oversee and provide technical guidance for layout optimization, compiler coding, and the interpretation of silicon testing results and debug activities
Conduct silicon debug and chip failure analysis for various customers, contributing to continuous improvement and next-generation design
Perform PPPA (Power, Performance, Area) optimization to meet stringent customer requirements across various technology nodes
Develop and implement design schemes for low power (LS/DS/SD), dual-rail, BIST, and foundry-based Write-Assist and Read-Assist circuitry
Collaborate strategically with cross-functional teams and Headquarters in Hsinchu, Taiwan, ensuring functional products are delivered efficiently
Act as a hands-on technical contributor for all compiler-related work, encompassing circuit design, automation, and verification
Qualification
Required
Master's degree in Electrical/Computer Engineering with 5+ years of related work experience; or a Bachelor's degree in Electrical/Computer Engineering with 7+ years of related work experience
Demonstrated expertise in Memory IP design, characterization, and verification methodologies at the compiler level
In-depth knowledge and hands-on experience with advanced SRAM compiler development, utilizing Cadence and Synopsys circuit design environments
Proven experience in advanced technology node circuit design (TSMC N10 or below, including TS7, GF22, Intel10, etc.) and layout
Expertise in scripting languages such as Perl/Shell/TCL/Python for design automation, simulation, and QA flow
Strong understanding of bitcell analysis, critical margin validation, and simulation setup
Experience in designing low-power techniques (LS/DS/SD), dual-rail, BIST, and foundry-based Write-Assist/Read-Assist circuitry
Preferred
Ph.D. in Electrical/Computer Engineering with a focus on memory circuit design
Exposure to TSMC N5 and below technology
Experience leading or coordinating design projects, including collaboration with layout and QA engineers
Advanced static timing analysis and sign-off capabilities
Track record in multi-million gate design production tapeouts
Strong interpersonal skills, excellent teamwork attitude, and the ability to work effectively under pressure in a fast-paced, collaborative environment
Knowledge of layout optimization techniques to improve yield, reduce RC loading, and optimize design size
Published research or patents related to memory circuit design
Company
TSMC
Established in 1987, TSMC is the world's first dedicated semiconductor foundry.
10001+ employees
H1B Sponsorship
TSMC has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (49)
2024 (27)
2023 (30)
2022 (17)
2021 (31)
2020 (35)
Funding
Current Stage
Public CompanyTotal Funding
$14.2BKey Investors
U.S. Department of CommerceBerkshire Hathaway
2024-04-08Grant· $6.6B
2024-01-01Acquired
2022-09-30Post Ipo Equity· $4.1B
Leadership Team
Morris Chang
Founder, Chairman & CEO
Peter M. Cleveland
Senior Vice President
Recent News
2026-01-23
2026-01-23
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