Physical Design Flow and Methodology Engineer jobs in United States
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Google · 13 hours ago

Physical Design Flow and Methodology Engineer

positionSunnyvale, CA
timeFull-time
remoteOnsite
seniorityMid, Senior Level
money$132K/yr - $189K/yr
date2+ years exp

Google is a leading technology company, and they are seeking a Physical Design Flow and Methodology Engineer to shape the future of AI/ML hardware acceleration. The role involves developing cutting-edge TPU technology and engineering advanced physical design flows and methodologies for ASIC development, ensuring high-quality results for all ASIC tapeouts.

AppsArtificial Intelligence (AI)Cloud StorageSearch EngineSEO
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Growth Opportunities
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H1B Sponsor Likelynote

Responsibilities

Architect and implement next generation Physical Design EDA CAD tool workflows for ASIC development
Collaborate with chip design teams to implement tools and methodologies for physical design in leading edge process nodes
Develop auditing tools, checkers, and metric dashboards based on APIs from 3rd party EDA tools
Own the physical design of blocks and subsystems end-to-end

Qualification

Physical design flowEDA toolsPython scriptingFull-chip designLow power verificationPhysical verificationAdvanced parasitic extractionTcl scriptingPerl scriptingSoft skills

Required

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
2 years of experience with physical design flow and methodologies
Experience with EDA tools for physical design
Experience in full-chip or block-level physical design
Experience with scripting in Python, Tcl, or Perl

Preferred

Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture
5 years of experience in physical design flow and methodologies for high-performance ASIC or SOC projects
Experience in sign-off areas such as physical verification (Caliber/IC Validator), Formal Verification (LEC), Extraction, Low Power Verification, STA closure, and ECO flows
Familiarity with 2.5D/3D IC packaging and proficiency with advanced parasitic extraction tools (e.g., STARRC)
Ability to develop and deploy repeatable design methodologies, focusing on low-power verification
Track record in achieving optimal Power, Performance, Area (PPA) goals in complex designs

Benefits

Bonus
Equity
Benefits

Company

Google

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Google specializes in internet-related services and products, including search, advertising, and software. It is a sub-organization of Alphabet.
dateFounded in 1998
location
Mountain View, California, USA
people-size10001+ employees
web-link
https://www.google.com

H1B Sponsorship

Google has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (8763)
2024 (8872)
2023 (9682)
2022 (11626)
2021 (9109)
2020 (9785)

Funding

Current Stage
Public Company
Total Funding
$26.1M
Key Investors
Andy Bechtolsheim
2004-08-19IPO
1999-06-07Series Unknown· $25M
1998-11-01Angel· $1M

Leadership Team

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Sundar Pichai
CEO
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Thomas Kurian
CEO - Google Cloud
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