Sr. ASIC Design Engineer jobs in United States
cer-icon
Apply on Employer Site
company-logo

Parade Technologies, Inc. · 4 days ago

Sr. ASIC Design Engineer

Parade Technologies is a fabless semiconductor company building ASICs for USB3.2, USB4, and PCIe. They are seeking a highly experienced Sr. ASIC Design Engineer to join their Oregon R&D team to build solutions for next-generation consumer electronics and mobile devices.

AppsSemiconductorVideo
check
Work & Life Balance
check
H1B Sponsor Likelynote

Responsibilities

Demonstrate an expert knowledge of Verilog for chip design
Demonstrate knowledge of System Verilog (SV) or similar verification language
Ability to read specifications, create a Micro-Architecture Specification (MAS), then implement design
Understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug
Design experience with USB3, USB4, or PCIe is a big plus. Design experience with another high-speed serial protocol such as SATA, Ethernet, Fibre Channel, or Display Port is also acceptable

Qualification

ASIC digital designVerilogRTL designVerificationSystem VerilogHigh-speed protocolsMicro-Architecture SpecificationTeamworkMentoringCommunication skills

Required

Must have a Bachelor's or Master's degree
At least 5 years of experience in ASIC digital design
Have worked on at least 2 designs that have gone to silicon
Must have a thorough understanding of digital design and verification
Should be able to take a specification, write RTL, and write simulation vectors to verify their RTL
Must have experience using Verilog
Be familiar with PCIe, USB2, USB3 or other high-speed protocols
Demonstrate an expert knowledge of Verilog for chip design
Demonstrate knowledge of System Verilog (SV) or similar verification language
Ability to read specifications, create a Micro-Architecture Specification (MAS), then implement design
Understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA prototyping, and first silicon bring up and debug
Design experience with USB3, USB4, or PCIe is a big plus
Design experience with another high-speed serial protocol such as SATA, Ethernet, Fibre Channel, or Display Port is also acceptable
Enthusiastic, self-motivated, and flexible with strong interpersonal skills
Be able to work in a team environment and mentor junior engineers
Good communication skills, oral and written

Benefits

Health, Dental, and Vision insurance (90% Employer Paid for employees, 80% for dependents)
Short-Term Disability, Long-Term Disability, Life and AD&D Insurance (100% Employer Paid)
15 days of paid time off and 10 paid holidays
Up to 3% 401(k) company match
Up to $4,300 HSA annual contributions

Company

Parade Technologies, Inc.

twittertwitter
company-logo
Parade Technologies develops and supplies integrated circuits for touch, display and high-speed digital interface applications.

H1B Sponsorship

Parade Technologies, Inc. has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2)
2024 (1)
2023 (1)
2021 (1)
2020 (2)

Funding

Current Stage
Public Company
Total Funding
$17.5M
Key Investors
AsiaVest Partners
2011-09-13IPO
2009-04-04Series Unknown· $3M
2007-08-09Series B· $14.5M

Leadership Team

M
Mark Qu
Co-Founder, President and Executive Vice President of Engineering
leader-logo
Jimmy Chiu
VP, Marketing
linkedin
Company data provided by crunchbase