LeadStack Inc. · 1 day ago
Design For Test (DFT) Engineer - 26-00096
San Diego, CA
Contract
Onsite
Senior Level
$100/hr - $130/hr
5+ years expLeadStack Inc. is an award-winning staffing services provider recognized for its contingent workforce solutions. They are seeking a Design-for-Test Engineer to work with Front End and Physical Design teams to implement DFT and test designs impacting RF and Bluetooth/Wireless LAN chipsets.
Business DevelopmentInformation TechnologyRecruitingStaffing Agency
Hiring Manager
Waseem Ahmad
Responsibilities
Experience with memory BIST – Siemens Tessent Flow
Experience with gate-level simulation and simulation debug
Experience with automation and scripting – Tcl/Perl/Python
Experience with scan compression – SEQ/Ultra/TestKompress
Experience with ATPG – Tetramax
Experience with ATPG diagnosis, ATE debug and silicon bring up
DFT pattern translation – VTRAN
Experience with RTL design – Verilog/system Verilog
Some experience with STA and timing analysis concepts – PrimeTime (CDC, clock gating checks, timing constraints)
Qualification
Required
5+ years relevant industrial DFT experience
Experience with memory BIST – Siemens Tessent Flow
Experience with gate-level simulation and simulation debug
Experience with automation and scripting – Tcl/Perl/Python
Experience with scan compression – SEQ/Ultra/TestKompress
Experience with ATPG – Tetramax
Experience with ATPG diagnosis, ATE debug and silicon bring up
DFT pattern translation – VTRAN
Experience with RTL design – Verilog/system Verilog
Some experience with STA and timing analysis concepts – PrimeTime (CDC, clock gating checks, timing constraints)
Excellent problem solving and debugging skills
Ability to complete assignments independently
Company
LeadStack Inc.
We are one of the nation’s fastest-growing, award- winning staffing services provider of contingent workforce.
51-200 employees
Funding
Current Stage
Growth StageLeadership Team
Dave Singh
Co-Founder and Co-CEO
Kazi Ahmed
Co-Founder and Co-CEO
Company data provided by crunchbase