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Aeonsemi · 9 hours ago

Analog / Mixed-signal Design Engineer

Santa Clara, CA

Full-time

Onsite

Entry, Mid Level

2+ years exp

Aeonsemi is a chip design company well positioned to meet the data communication demand driven by Physical AI. They are seeking an Analog/Mixed-signal Design Engineer to work with a team of designers to design high performance RF/Analog/mixed-signal circuits for high-speed wireline transceiver products using advanced CMOS technologies.

Semiconductor

H1B Sponsor Likely

Responsibilities

You will be working with a team of designers to design high performance RF/Analog/mixed-signal circuits for high-speed wireline transceiver products using advanced CMOS technologies

Block level architecture design

Schematic design, simulation, behavioral modeling, validation plan

Supervise layout engineer and hands-on layout of critical paths when needed

Lab characterization

Qualification

Analog/mixed-signal designCadence design environmentDSP-based communication systemCircuit theorySignal processingPythonCommunication skills

Required

MS or Ph.D in electrical engineering with minimum 2 years of experience

Solid understanding of circuit theory and signal processing principles

Experience designing a complete DSP-based communication system

Proficient in Cadence design environment

Good communication skills

Preferred

Proficient in Python or other programming language

Benefits

Health care

Dental

401k

Company

Aeonsemi

Aeonsemi is a fabless IC startup company developing analog mixed-signal DSP centric products for network communication application.

Founded in 2018

Santa Clara, California, USA

51-200 employees

http://www.aeonsemi.com/

H1B Sponsorship

Aeonsemi has a track record of offering H1B sponsorships. Please note that this does not guarantee sponsorship for this specific role. Below presents additional info for your reference. (Data Powered by US Department of Labor)

Distribution of Different Job Fields Receiving Sponsorship

Represents job field similar to this job

Trends of Total Sponsorships

2025 (3)

2024 (2)

2023 (1)

2022 (2)

Funding

Current Stage

Growth Stage

Total Funding

$11.46M

2019-02-22Series Unknown· $11.46M

Leadership Team

Yunteng Huang

CEO and Co-Founder

Xi Chen

Co-Founder

Recent News

Google Patent

Timestamping ethernet physical layer (phy) frames

2025-02-10

Business Wire

Aeonsemi Unveils Nemo™ Platform: Revolutionizing In-Vehicle Networking with Multi-Gigabit Ethernet

2024-05-08

Google Patent

Adaptive mode imbalance compensation

2024-04-15

Company data provided by crunchbase