NVIDIA · 1 day ago
Senior Physical Design Engineer - Circuits
Austin, TX
Full-time
Hybrid
Senior Level
$168K/yr - $264K/yr
6+ years expNVIDIA is a leader in computer graphics and accelerated computing, and they are seeking a Senior Physical Design Engineer in their Circuits Solutions Group. The role involves leading physical design activities for custom circuits, collaborating with design teams, and establishing methodologies for innovative circuit implementations.
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Hiring Manager
Christian Bada
Responsibilities
Work as part of a global circuits team alongside custom circuit designers and custom mask designers to deliver physical designs of innovative circuits for hardware security, adaptive clocking, and power management solutions
Responsible for all aspects of physical design and implementation of custom macros for GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets
In this position, you will be expected to lead all custom circuit IP level PD activities for the macros assigned to you
You will have the unique opportunity to drive the physical implementation of custom mixed signal IPs using industry standard tools and novel custom AI automated place and route tools
Participate in establishing physical design methodologies, flow automation, floorplan, power/clock distribution, custom IP P&R, and timing closure
PD activities include floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification
Will be required to work in collaboration with design team to address design challenges
Qualification
Required
BSEE (MSEE preferred) or equivalent experience
6+ years of experience in large VLSI physical design implementation on 5nm, 4nm and/or 3nm technology
Successful track record of delivering designs to production is a requirement
Good understanding of the RTL2GDSII concepts related to synthesis, place & route, CTS, timing convergence, layout closure
Good knowledge and experience in Block-level Floor-planning and Physical verification
Working experience with tools like ICC2/Innovus, Primetime/Tempus etc used in the RTL2GDSII implementation
Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred
Well versed with timing constraints, STA, and timing closure
Good automation skills in Python, PERL, TCL, tool specific scripting on one of the industry leading Place & Route tools
Preferred
MSEE preferred
Strong knowledge and experience in standard place and route flows ICC2/Synopsys and Innovus/Cadence flows preferred
Proficiency using Perl, Tcl, Make scripting is preferred
Excellent communication skills and strong motivation to drive projects to completion
To be successful you should possess strong analytical and problem solving skills
Ability to multi-task and flexibility to work in global environment
Good understanding of process issues and digital circuit design techniques is a plus
Good understanding of transistor level fundamentals is a plus
Benefits
Equity
Benefits
Company
NVIDIA
NVIDIA is a computing platform company operating at the intersection of graphics, HPC, and AI.
10001+ employees
H1B Sponsorship
NVIDIA has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
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2025 (1877)
2024 (1355)
2023 (976)
2022 (835)
2021 (601)
2020 (529)
Funding
Current Stage
Public CompanyTotal Funding
$4.09BKey Investors
ARPA-EARK Investment ManagementSoftBank Vision Fund
2023-05-09Grant· $5M
2022-08-09Post Ipo Equity· $65M
2021-02-18Post Ipo Equity
Leadership Team
Jensen Huang
Founder and CEO
Michael Kagan
Chief Technology Officer
Recent News
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