Andes Technology ยท 5 hours ago
RISC-V Design Verification Engineer (Intermediate-Staff)
Andes Technology is a leading supplier and technological innovator in the RISC-V market. They are seeking a RISC-V Design Verification Engineer to join their VLSI team, where the candidate will guide verification methodologies and analyze CPU architecture to ensure high-quality results.
Responsibilities
Communication with peers to discuss technical details
Analyze CPU architecture and microarchitecture implementations, and devising best methods to verify them
Identify and resolve engineering issues ranging from functional verification, code coverage, Formal proofs, verification reports
Hands-on verification work including verification regression management, debugging and bug-reports
Provide technical guidance to junior members of the team
Technical documentation
Qualification
Required
Bachelor's or Master's degree in related engineering field
Strong communication skills
Experience using Verilog, System Verilog
Strong mastery using Unix and scripting languages such as make, shell, perl or python
Preferred
Experience of CPU architecture (multi-core coherence, FPU, DSP, interrupt, Vector, Security, Reset and CDC, Debug)
Experience with ground-up test-benches development
Experience with functional coverage-driven verification
Familiar with stimulus generation for constrained random simulation. Experience coding in assembly languages
Experience in UVM, formal, coverage grading, coverage analysis, bug tracking
Patience and good leadership skills
Strong desire to learn and willing to devote extra effort to achieve perfection
Strong team player and possess a positive attitude
Company
Andes Technology
Andes Technology Corporation is a leading RISC-V processor intellectual property supplier in the world.
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-03-14IPO
2010-10-01Series Unknown
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