Intel Corporation · 3 hours ago
CPU Physical Design Automation Engineer
US, Texas, Austin
Full-time
Hybrid
Mid, Senior Level
$122K/yr - $200K/yr
3+ years expIntel Corporation is a leading technology company focused on creating world-changing technology. They are seeking a CPU Physical Design Automation Engineer to develop and support backend physical design methodologies and automation, while collaborating with design teams and EDA vendors.
Semiconductors
Responsibilities
Developing, debugging, and supporting tools, flows, and methodologies covering backend physical design methodologies and flow automation for high-performance blocks and full chip level using RTL2GDS standard cell level design techniques
Performing analysis of either synthesis, place and route, floor planning or signoff for static timing analysis on timing paths, formal equivalence verification, power consumption, electrical rule checking, and circuit reliability to identify key issues
Working closely with design teams to understand and debug tool issues and constraints
Working with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU
Creating documentation and helping with guidelines/specs
Communicating with other team members to solve problems and following solutions through to completion. Excellent verbal and written English communication skills
Qualification
Required
Bachelor's Degree in Computer Engineering and/or Electrical Engineering and 4+ years of relevant working experience OR Master's Degree in Computer Engineering and/or Electrical Engineering in Computer Engineering and/or Electrical Engineering and 3+ years of experience
1+ years of experience in hardware design and engineering, such as VLSI, design automation algorithms, and transistor-level design
1+ years' experience with Python, Perl, and/or Tcl scripting languages
Preferred
1+ years of relevant working experience in microprocessor or other high speed design backend design
1+ years of experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from vendors such as Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification
Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints)
Benefits
Competitive pay
Stock bonuses
Benefit programs which include health, retirement, and vacation
Company
Intel Corporation
Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside.
10001+ employees
H1B Sponsorship
Intel Corporation has a track record of offering H1B sponsorships. Please note that this does not
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Funding
Current Stage
Late StageLeadership Team
Brea Watts, MFA
Communications Manager, CEO
Carol Bartz
CEO
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