Apply on Employer Site

Google DeepMind · 4 hours ago

Low power design engieer/micro-architect L5

New York City, New York, US

Full-time

Onsite

Senior Level

7+ years exp

Google DeepMind is a leading company in artificial intelligence research, seeking a Low Power Design Engineer / Micro-architect to enhance their silicon design for machine learning acceleration. The role involves defining low-power micro-architecture, optimizing power consumption, and collaborating with various teams to meet performance goals.

Artificial Intelligence (AI)Business DevelopmentFoundational AIMachine Learning

Growth Opportunities

Responsibilities

Define and own the low-power micro-architecture for custom silicon IPs used in ML acceleration

Steer and actively participate in the development of low-power design techniques, from architectural conception through RTL implementation

Conduct hands-on analysis and optimization of power consumption, identifying and driving implementation of power-saving features (e.g., clock gating, power gating, dynamic voltage/frequency scaling)

Collaborate with architecture, RTL, and physical design teams to establish power budgets and ensure low-power design intent is met

Work with verification teams to define and review low-power verification plans

Analyze power reports from synthesis, P&R, and power analysis tools to drive optimizations

Qualification

Low-power design techniquesRTL design (Verilog/SystemVerilog)Power analysis toolsASIC design experienceMicro-architecture knowledgeElectrical Engineering degreeComputer Science degreePh.D. in related fieldCollaboration skillsFlexibilityAdaptability

Required

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience

7+ years of experience in ASIC design or micro-architecture, with a strong focus on low-power design

Hands-on experience with RTL design (Verilog/SystemVerilog)

Deep understanding of low-power design techniques (e.g., multi-voltage domains, power gating, clock gating, DVFS)

Experience with power analysis and estimation tools (e.g., PrimeTime-PX, PowerArtist, or similar)

Preferred

Master's or Ph.D. in a related field

Experience in developing and implementing low-power strategies for complex IPs, such as ML accelerators, GPUs, or high-performance compute blocks

Knowledge of micro-architecture trade-offs for performance, power, and area (PPA)

Familiarity with UPF (Unified Power Format) and low-power verification methodologies

Good understanding of the full ASIC design flow, including physical design and verification impact

Company

Google DeepMind

Glassdoor4.5

Google DeepMind aims to research and build safe artificial intelligence system to solve intelligence and advance science and humanity. It is a sub-organization of Google.

Founded in 2010

London, England, GBR

501-1000 employees