RF/Microelectronics Packaging Engineer jobs in United States
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Viasat · 6 hours ago

RF/Microelectronics Packaging Engineer

Viasat is a global communications company on a mission to deliver connections that change the world. The RF/Microelectronics Packaging Engineer will handle all aspects of packaging development for radio frequency communication devices, including planning, crafting, and developing advanced packaging solutions.

InternetOptical CommunicationTelecommunications
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Responsibilities

Working closely with project development teams and product groups (RFIC, MMIC, Module) to develop the next generation/sophisticated/novel packaging solution for RF communication products
Define packages and materials that meet product requirements for reliability, performance, manufacturability, and cost
Ensure all packaging work is completed for New Product and New Technology Introductions
Develop and manage packaging documentation including SOWs, package drawings, and process flows
Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers
Ensure early success in package development with modeling and simulation for thermal, mechanical, and electrical
Technically oversee vendors in the manufacture of said packages in conjunction with manufacturing engineers
Apply your assembly knowledge of die attach, Wirebond, bumping, overmolding to advise product groups on options available to solve problems
Identify suitable IC, sub-assembly, and module package options and perform feasibility studies for new products
Interact with product groups for package/cost optimization along with mechanical engineering
Specify and conduct reliability testing by vendors to insure the reliability of the packaged product
Coordinate package related activities across multiple organizations including Marketing, Design, Applications, Test, Assembly Engineering, Quality, and Manufacturing (internal and external factories)
Address and solve materials and processing issues that may occur during the development process
Manage the package process using industry standard project management tools
Develop and maintain the packaging and technology roadmap through proposal support and long term technology programs

Qualification

Semiconductor packagingMicro-electronic package structureRFIC packaging knowledgePackage design experienceHeat transfer understandingDie attach knowledgeStatistical methodsProject management toolsCadence APD/SiPSolidWorksMicrosoft ExcelCustomer service orientationInterpersonal skills

Required

10+ years in semiconductor packaging including experience in package assembly process, package engineering, quality & reliability and the intersection/relationship of packaging to test
Deep understanding of micro-electronic package structure, mechanical, electrical and thermal performance
Solid grasp of heat transfer and its relation to material properties
Packaging knowledge in RFIC, millimeterware, System In Package, sub-assembly, and/or modules
Experience in semiconductor package design with demonstrated experience in one or more of the following: QFN, SiP, BGA, WL-CSP, Flip Chip and Bumping or FO-WLP
Strong understanding of Die Prep, Assembly (die attach, Wirebond, flip chip, etc) and Surface Mount Technology (SMT) process-equipment is desired
Have a high tolerance for ambiguity and solid interpersonal skills
In-depth knowledge of interconnect reliability daisy chain testing, CPI and BLR
Understands the metallization schemes for laminates, interposers and SMT
Knowledge of statistical methods and Building of Experiments
Must be able to work autonomously and help determine methods and procedures
Customer service oriented
Ability to work with build teams to translate IC/system requirements input packaging configurations
Ability to manage and drive packaging
Bachelor's Degree in Electrical, Mechanical, Materials Engineering or related technical discipline
US Government position. US Citizenship required
Ability to travel up to 10%

Preferred

Strong Preference for RF, Microwave or mmWave experience
Experience with package build software like Cadence APD/SiP
Experience with electronic compose and layout tools such as Cadence Concept HDL, Mentor Graphics DxDesigner, or Zuken
Prior volume OSAT experience is highly desired
Experience in ITAR and Mil programs
SolidWorks tool usage
Knowledge or exposure of wafer to wafer bonding
Knowledgeable about ATE
IMAPs and/or MEPTEC membership
Knows the latest semiconductor packaging trends
Understands MIL-STD-883 and JEDEC requirements
Proficient user of Microsoft Excel and other Office products

Benefits

A range of medical, financial, and/or other benefits

Company

Viasat is a global communications company that offers satellite services.

Funding

Current Stage
Public Company
Total Funding
$3.16B
Key Investors
UK Space AgencyNASA
2025-11-21Grant· $1.15M
2024-09-09Post Ipo Debt· $1.98B
2023-09-13Post Ipo Debt· $733.4M

Leadership Team

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Andy Lincoln
Chief Engineer
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Don Buchman
President Aviation
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Company data provided by crunchbase