Qualcomm · 23 hours ago
Senior Staff Formal Verification Engineer
Qualcomm Technologies, Inc. is a leader in advanced mobile device technology, and they are seeking a Senior Staff Formal Verification Engineer to develop high-quality formal verification test benches for complex GPU designs. The role involves collaborating with design and implementation teams to ensure high-quality verification and debugging of hardware designs.
Artificial Intelligence (AI)Generative AISoftwareTelecommunicationsWireless
Responsibilities
Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms
Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis & run time performance
Drive debug failures on emulator using latest technologies. Work with designers and SW driver team for testplan and debug
Work with tool vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL
Work on third-party IP integration and system-level debugging
System level RTL simulation & design verification
Support chip bring up and post silicon debug
Debug functional and timing models
Qualification
Required
Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
OR Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
OR PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience
Proficient in debugging, deep bug hunting, formal tools, formal verification methodologies and processes
Proficient in design debug and assertion development
Synthesize the Verilog RTL and create models and compile them to emulators like Veloce/Palladium/Zebu and/or FPGA platforms
Develop all aspects of hardware emulator implementation, with emphasis on design partitioning, synthesis, place and route, timing analysis & run time performance
Drive debug failures on emulator using latest technologies
Work with designers and SW driver team for testplan and debug
Work with tool vendors and push the methodology to improve the area/performance of the synthesized FPGA RTL
Work on third-party IP integration and system-level debugging
System level RTL simulation & design verification
Support chip bring up and post silicon debug
Debug functional and timing models
Preferred
Bachelors degree in Science, Engineering, or closely related field
1+ years of hands on experience in emulation/simulation acceleration/FPGA
1+ years in Design validation/Post-Silicon debug
1+ years of hands on experience in creating high performance & area efficient emulation environments from RTL
1+ years of hands on emulator platforms, platform bringup, digital design, verification, debugging, and waveform viewers
1+ Hardware emulators, such as Palladium, ZeBu, Veloce, or FPGA systems based on Xilinx or Altera FPGAs
1+ Emulation methodologies, including in-circuit emulation, hybrid systems, or simulation acceleration
Benefits
Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package
Company
Qualcomm
Qualcomm designs wireless technologies and semiconductors that power connectivity, communication, and smart devices.
H1B Sponsorship
Qualcomm has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (2013)
2024 (1910)
2023 (3216)
2022 (2885)
2021 (2104)
2020 (1181)
Funding
Current Stage
Public CompanyTotal Funding
$3.5M1991-12-20IPO
1988-01-01Undisclosed· $3.5M
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