L3Harris Technologies · 1 day ago
ASIC/FPGA Design Engineer (SMES)
L3Harris Technologies is dedicated to recruiting and developing high-performing talent in the defense tech sector. The ASIC/FPGA Design Engineer (SMES) will be responsible for delivering FPGA/ASICs for high-speed crypto applications, developing detailed architecture, and performing module level verification and lab debugging.
CommercialInformation TechnologyNational Security
Responsibilities
Responsible for deriving engineering specifications from system requirements and developing detailed architecture
Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint)
Generate test plans
Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards
Silicon/FPGA bring up, characterization and production ramp/support/collateral
Qualification
Required
BSEE, MSEE Preferred
5+ year's equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products
Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs
Proficient with CDC, RDC. Formal EDA
Proficient in VHDL
Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado
Strong logic/board debug, and analytical skills
Experience with project leadership and EVM
Excellent written, verbal, and presentation skills
Active SECRET Clearance
Preferred
Proficiency in C++ (OOP)
Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS
Knowledge of PCIe, NVMe, USB protocols
Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto)
Benefits
Health and disability insurance
401(k) match
Flexible spending accounts
EAP
Education assistance
Parental leave
Paid time off
Company-paid holidays
Company
L3Harris Technologies
L3Harris Technologies provides platform management system solutions for armed forces.
Funding
Current Stage
Public CompanyTotal Funding
$2.25B2024-03-27Post Ipo Debt· $2.25B
1978-01-13IPO
Leadership Team
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