Rambus · 2 days ago
Lead Verification Engineer
San Jose, CA
Full-time
Hybrid
Senior Level, Lead/Staff
$126K/yr - $234K/yr
6+ years expRambus is a premier chip and silicon IP provider, seeking to hire an exceptional Lead MTS Verification Engineer to join their Security team. The role involves participating in the verification of secure ASIC cores and collaborating with various functional teams to ensure robust product development.
ArchitectureLightingSemiconductor
Responsibilities
Partner closely with our architecture and design teams in specification and customer requirement reviews
Design and implement verification test plans, testbenches, infrastructure, and platforms to produce thoroughly verified and robust products
Implement best verification practices and improve on the existing methodologies and flows
Tackle sophisticated problems and develop scalable solutions that work across platforms
Assist with all hardware project phases – bring-up, testing, debug, coverage analysis, and tracking
Help with IP integration in partner environments and provide debug assistance to customer support teams
Qualification
Required
BS or MS degree in electrical or computer engineering or closely related degree strongly preferred; but substantial, relevant, outstanding work experience may substitute in some cases
Six or more years of experience working as a verification engineer or related field
Strong written and verbal communication skills: ability to explain complex concepts in front of technical audience
Strong desire to take ownership of all verification aspects of a project
Exposure to block-level and/or system-level verification
High technical competence that includes a track record of effective verification of complex digital designs
Solid understanding of standard ASIC verification techniques, including: Test planning, Testbench creation, Code and functional coverage, Directed and SystemVerilog-based constrained random stimulus generation, Self-checking – scoreboards, predictors, or reference models, Assertions
Solid understanding of verification methodologies (UVM or OVM) and standard testbench languages
Comfortable with Unix development environments (make, scripting, SVN, etc.)
Ability to support testbench lint/rule checking, profiling and automation using perl or python scripting
Familiarity with advanced verification techniques such as object-oriented testbenches and formal verification
Excellent written, verbal, and interpersonal communication skills
Able to communicate ideas in both technical and user-friendly language
Able and willing to work in a team-oriented, collaborative environment
Able to coordinate with internal and external teams across time zones
A demonstrated ability to prioritize and execute tasks so as to achieve goals in an innovative, fast-paced, and often high-pressure environment
Proven analytical and creative problem-solving abilities
Passion for writing clean and neat code that adheres to coding standards
Preferred
Experience developing object-oriented testbench infrastructure in C/C++, OVM, or UVM
Experience in creating FPGA bitfiles for FPGA emulation/acceleration purposes
Familiarity with IP integration, IP core delivery, and handoff issues
Data, software, and/or network security; cryptography
Ability to work with technical writers in the production of technical documentation
Benefits
Competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership
Company
Rambus
Rambus designs, develops and licenses chip interface technologies and architectures that are used in digital electronics products.
501-1000 employees
H1B Sponsorship
Rambus has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (25)
2024 (16)
2023 (7)
2022 (8)
2021 (3)
2020 (11)
Funding
Current Stage
Public CompanyTotal Funding
$288.57M2023-07-20Acquired
2011-06-07Post Ipo Equity· $88.57M
2010-02-02Post Ipo Equity· $200M
Leadership Team
Luc Seraphin
CEO
Sean Fan
Chief Operating Officer
Recent News
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