AMD ยท 2 weeks ago
Memory PHY RTL Design Engineer
Santa Clara, CA
Full-time
Onsite
Mid Level
$160K/yr - $240K/yrAMD is a company focused on building innovative products that enhance computing experiences across various domains including AI and data centers. They are seeking a Memory PHY RTL Design Engineer to contribute to the design and development of high-speed memory PHYs and interface IP, collaborating with various engineering teams to deliver industry-leading solutions.
AI InfrastructureArtificial Intelligence (AI)Cloud ComputingComputerEmbedded SystemsGPUHardwareSemiconductor
No H1B
Responsibilities
RTL design for memory I/O
PHY Digital Architecture development from pathfinding, coding, verification to physical implementation
PHY link layer design, implementation & verification with Analog and System architect
PHY Analog/Digital co-design
Digital design and RTL coding
Timing Synthesis & Drive Physical implementation
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the unit tests
Debug design failures to determine the root cause; work with DV and firmware engineers to resolve design defects and correct any test issues
Qualification
Required
Bachelors or Masters degree in computer engineering/Electrical Engineering
RTL design for memory I/O
PHY Digital Architecture development from pathfinding, coding, verification to physical implementation
PHY link layer design, implementation & verification with Analog and System architect
PHY Analog/Digital co-design
Digital design and RTL coding
Timing Synthesis & Drive Physical implementation
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the unit tests
Debug design failures to determine the root cause; work with DV and firmware engineers to resolve design defects and correct any test issues
Strong analytical and problem-solving skills
Excellent communication skills
Experience collaborating with other engineers located in different sites/timezones
Preferred
Digital design engineering experience
Experienced with Verilog, System Verilog, C, and C++
Excellent knowledge of Verilog, System Verilog and a scripting language; experience with Python, Perl and TCL is a plus
Knowledge of clocking architectures, synchronization, and CDC methodology
Experience with synthesis, Timing closure
SERDES, DDR, Memory Controller, or MAC Design experience is preferred
Proficient in debugging firmware and RTL code using simulation tools
Strong understanding of computer organization/architecture
Mixed signal RTL, Low power design experience is a plus
Exposure to leadership or mentorship is an asset
Benefits
AMD benefits at a glance.
Company
AMD
Advanced Micro Devices is a semiconductor company that designs and develops graphics units, processors, and media solutions.
Founded in 1969
10001+ employees
Funding
Current Stage
Public CompanyTotal Funding
unknownKey Investors
OpenAIDaniel Loeb
2025-10-06Post Ipo Equity
2023-03-02Post Ipo Equity
2021-06-29Post Ipo Equity
Leadership Team
Lisa Su
Chair & CEO
Mark Papermaster
CTO and EVP
Recent News
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2026-01-11
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