Astera Labs · 2 months ago
Firmware Engineer Manager, BootROM and Simulation Modeling
San Jose
Full-time
Onsite
Senior Level, Lead/Staff
10+ years expAstera Labs is a company providing rack-scale AI infrastructure through innovative connectivity solutions. They are seeking a Firmware Engineering Manager to lead development efforts for BootROM firmware and simulation modeling, focusing on hardware/firmware co-design and architectural validation.
AutomotiveElectronicsIntelligent SystemsSemiconductor
Responsibilities
Drive the architecture and design strategy for the HW/SW security subsystem, ensuring robust integration of DICE and Attestation functionality in the BootROM
Plan and implement BootROM features: work closely with Security Council and Product Marketing to prioritize the features, create development and validation plan, execute the plan, and communicate status
Develop simulation models: create and validate SystemC/TLM models for SoC components, ensuring accurate representation of hardware behavior for BootROM development and testing
Co-develop hardware/firmware interfaces: work closely with RTL designers to define SoC interfaces to crypto engines and debug/management interfaces, ensuring robust integration
Co-simulate RTL and firmware: conduct co-simulation to identify bugs and propose enhancements, focusing on PCIe Link Training and Status State Machine (LTSSM) and Ethernet link equalization at 100G–800G, collaborating with design/verification teams to implement fixes
Demonstrate entrepreneurial mindset, customer-oriented approach, and professional communication skills for preparing and leading meetings with internal teams and CSPs
Qualification
Required
Bachelor's or Master's in Electrical Engineering, Computer Engineering, or Computer Science, with a focus on embedded systems or digital design
10–15 years developing or supporting firmware for complex SoC/silicon products in compute, networking, or storage applications, with hands-on experience in microcontroller subsystems (e.g., ARM or equivalent)
Expertise in SoC microcontroller architectures, including memory, interrupts, and peripherals
Experience with cosim and simulation environments
Experience with SystemC/TLM modeling
In-depth understanding of DICE requirements
Preferred
Experience leading small teams in an agile, hands-on manner — planning sprints, assigning tasks based on strengths/aspirations, providing constructive feedback, tracking project status, and addressing execution gaps
Experience with cryptography and the Caliptra subsystem is highly desirable
Experience in FIPS 140 certification and OCP S.A.F.E. audits will set the prospective candidate apart
Company
Astera Labs
Astera Labs is a semiconductor company that provides connectivity solutions for intelligent systems.
201-500 employees
H1B Sponsorship
Astera Labs has a track record of offering H1B sponsorships. Please note that this does not
guarantee sponsorship for this specific role. Below presents additional info for your
reference. (Data Powered by US Department of Labor)
Distribution of Different Job Fields Receiving Sponsorship
Represents job field similar to this job
Trends of Total Sponsorships
2025 (50)
2024 (44)
2023 (17)
2022 (26)
2021 (14)
2020 (7)
Funding
Current Stage
Public CompanyTotal Funding
$206.35MKey Investors
Fidelity
2024-03-20IPO
2022-11-17Series D· $150M
2021-09-27Series C· $50M
Leadership Team
Jitendra Mohan
CEO
Casey Morrison
Chief Product Officer, Co-Founder
Recent News
The Motley Fool
2026-01-07
2025-12-29
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