Marvell Technology ยท 3 days ago
Design Verification Engineer
Marvell Technology is a leading provider of semiconductor solutions that support data infrastructure across various sectors including enterprise, cloud, and AI. The Design Verification Engineer will be responsible for verifying circuitry in chips, ensuring designs meet specifications for clients in telecommunications and automotive industries.
DSPInternet of ThingsManufacturingSemiconductorWireless
Responsibilities
Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers
Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete
Develop tests and tune the environment to achieve coverage goals
Debug failures and work with designers to resolve issues
Qualification
Required
Proficiency using C/C++
Experience with Verilog and SystemVerilog, preferably with UVM
Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment
Experience with scripting language such as Python or Perl and EDA Verification tools
A good understanding of Linux OS
BS or MS in Computer Engineering, Electrical Engineering, or Computer Science with 3+ years of verification and firmware and software development experience
Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision
Requires the ability to accept and work with differing opinions
Must be able to learn on the fly and work in a fast-paced environment
Benefits
Flexible time off
401k
Year-end shutdown
Floating holidays
Paid time off to volunteer
Company
Marvell Technology
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.
Funding
Current Stage
Public CompanyTotal Funding
unknown2017-01-20Post Ipo Equity
2016-05-13Post Ipo Equity
2015-02-05Acquired
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