Asic Design Verification Engineer – Risc V And Or Systolic Array Experience Required in united states (1000+)

605 results for "Asic Design Verification Engineer – Risc V And Or Systolic Array Experience Required"

7 hours agoBe an early applicant

Mechanical Systems Integration Design Engineer

General Atomics Aeronautical Systems

Telecom & Communications · Energy · Late Stage

Less than 25 applicants

MATCH SCORE

H1B Sponsor Likely

11 hours ago

ASIC Design verification Engineer

Capgemini Engineering

Consulting · Mechanical Engineering · Public

11 hours agoBe an early applicant

Senior Principal Systems Engineering Integration and Test ( SEIT ) Lead

Northrop Grumman Australia

Defense & Space · Late Stage

United States-Maryland-Baltimore

Full-time

$136K/yr - $204K/yr

Onsite

Senior Level, Lead/Staff

6+ years exp

Less than 25 applicants

MATCH SCORE

No H1B

13 hours agoBe an early applicant

PDK and CAD Support Engineer – Integrated Circuit Design (ASIC and MMIC)

RTX

Telecom & Communications · Aerospace · Public

Less than 25 applicants

MATCH SCORE

No H1B

14 hours ago

Systems Engineer, Requirements and Integration

Oklo Inc

Artificial Intelligence (AI) · Energy · Public

Senior ASIC Design Verification Engineer

Ethernovia

Telecom & Communications · Transportation · Growth Stage

Senior Level, Lead/Staff

Software Engineer & Computer Science - Summer 2026 Intern (US Person Required)

Honeywell

Aerospace · Electronics · Public

ASIC Design Verification Engineer I (Full Time) - United States

Cisco

Telecom & Communications · Enterprise Software · Public

New Grad, Entry Level

22 hours agoBe an early applicant

Senior FPGA/ASIC Design /Verification Engineer (Onsite)

Collins Aerospace

National Defense · Aerospace · Late Stage

Less than 25 applicants

MATCH SCORE

No H1B

23 hours agoBe an early applicant

Structures & Payload Design Engineer (Payload Systems Design) - Experienced or Senior

Boeing

Aerospace · Industrial · Late Stage

Less than 25 applicants

MATCH SCORE

No H1B

23 hours agoBe an early applicant

Power System Design and Integration Engineer

Apple

Artificial Intelligence (AI) · Digital Media · Public

Less than 25 applicants

MATCH SCORE

Comp. & Benefits

H1B Sponsor Likely

1 day agoBe an early applicant

Systems Engineer - Integrated Systems Design

General Dynamics Mission Systems

National Defense · Enterprise Software · Late Stage

Less than 25 applicants

MATCH SCORE

No H1B

1 day agoBe an early applicant

09 - Senior Lead Engineer, Systems/Applications Design

Celestica

Electronics · Manufacturing · Public

Richardson, TX

Full-time

Onsite

Senior Level, Lead/Staff

4+ years exp

Less than 25 applicants

MATCH SCORE

No H1B

1 day ago

Principal IC Design Verification Application Engineer

Cadence

Artificial Intelligence (AI) · Semiconductor · Public

Senior Level, Lead/Staff

ASIC/FPGA Design Engineer V with Security Clearance

Lockheed Martin

National Defense · Cyber Security · Public

North Andover, Massachusetts, 01845

Full-time

$145K/yr - $256K/yr

Onsite

Senior Level, Lead/Staff

Design Verification Engineer (FPGA / ASIC)

KPG99 INC

Consulting · Human Resources · Growth Stage

Spectral Integration Engineer (Expert-Level) - TS/SCI Clearance Required

Core-CSI

Cyber Security · Information Technology · Early Stage

Systems Engineer (MSP Experience Required)

Paradise InfoTech & Automation

Industrial · Software · Early Stage

1 day agoBe an early applicant

Sr Principal Engineer Systems Design (P5) - Expendable Engines

Pratt & Whitney

Aviation & Aerospace · Late Stage

Senior Level, Lead/Staff

7+ years exp

Less than 25 applicants

MATCH SCORE

No H1B

1 day ago

Power Integrity Validation Engineer, Board/System Design

Palo Alto Networks

Artificial Intelligence (AI) · Cloud Computing · Public

Orion

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